Job Description

@HYVE Solutions, missions to help customers, business partners, and employees achieve success through shared goals, strategies, resources and technology solutions.

Role Summary

Lead board-level architecture and design for server, AI, and storage platforms, with ownership of electrical architecture, layout optimization, BOM modeling, and cost/performance optimization. Member of the CTO Architecture team, with ownership of board architecture and product definition in this domain.

Key Responsibilities

• Define and lead board architecture (CPU/GPU baseboards, accelerators, storage platforms)
• Own BOM modeling, sizing, and cost optimization across performance tiers
• Lead board design teams and drive component selection and system-level trade-offs (power delivery, memory topology, IO layout)
• Lead schematic and layout reviews; ensure manufacturability and scalability
• Collaborate with SI/PI, thermal, and platform architects to optimize full-system performance
• Support bring-up, validation, and iterative design improvements

Qualifications

• 10–15+ years in server or high-performance board design
• Deep expertise in DDR, PCIe, high-speed IO, and power delivery
• Strong experience with BOM modeling and cost/performance trade-offs
• Proven track record delivering complex boards to production
• Familiarity with hyperscaler or AI system requirements preferred

Join Hyve Solutions

• Work across multiple silicon and technology ecosystems
• Architect systems from concept through global, rack-scale deployment
• Engage directly with hyperscaler and AI-native customers
• Operate at the intersection of platform design, manufacturing, and scaled deployment

@ HYVE Solutions, we believe employees are our greatest asset and we empower them to make a difference in our business. Diversity and inclusion make us all better. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.