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ASIC Digital Design Engr, Staff

Synopsys

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Boxborough, MA
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Job Description

As posted by the hiring company

Job Overview:

Job Description and Requirements

Our IP Design and Development Team Is Hiring:

DDR IP is a staple of the mixed-signal IP market, and Synopsys is the leading provider of DDR IP products.  All current and next-generation technologies like LPDDR5X, DDR5, and beyond, are being developed by the DDR IP team.  Both digital and analog components, all developed by the DDR RTL team, complement each other in creating a high-performance, high-bandwidth, low-latency and low-power product.

Some descriptions of requirements and tasks are as follows.  The ideal candidate is or has:
  • Extensive design and technical leadership experience (12+ years) in digital and mixed-signal ASIC and custom RTL design, using leading-edge technologies. 
  • Experience with synthesizable Verilog and System Verilog design concepts and implementation.
    • This involves designing, developing, and evaluating DDR (Dual Data Rate) memory PHY designs for DDR5, LPDDR5, and similar existing and future memory JEDEC specifications.
  • Proficient in Verilog with broad experience in RTL architecture, development, and debug. 
  • Working knowledge of testbench development , including use of simulation debug tools such as waveform debuggers, assertions, and coverage collection and review. 
  • Working knowledge of RTL lint tools. 
  • Experience with front-end design flows such as synthesis, timing investigation and closure, cross-domain clocking, and power optimization techniques.
  • Demonstrated ability using scripting languages (perl, python, etc.) and UNIX operating system environment for supporting RTL development tasks and build, test, and release flows.
  • Experience with C or C++, especially in an embedded processor application environment.

Preferred candidates have one or more of the following:

  • Experience with both ASIC and FPGA synthesis, and exposure to emulation technologies.
  • Ability to coordinate, communicate with, and steer technical, cross-site teams and designs across time zones.
  • Contributes to development of business unit goals and practices, achieving results in innovative and effective ways.
  • Customarily exercises a high level of unaided judgment and interpretation in developing methods, techniques and evaluation criteria to obtain results.
  • Drives projects, programs, and business initiatives.
  • Regularly acts autonomously to establish methods and procedures on new or special assignments and projects.
  • Advises senior management on specialized technical issues.
    Post-graduate coursework or knowledge-base equivalent is expected.

    If you have most or all of the above skills, please contact us!

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
 

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

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Synopsys has adopted a COVID-19 vaccination policy to safeguard the health and well-being of our employees and visitors. As a condition of employment, all employees based in the U.S. are required to be fully vaccinated for COVID-19, unless a reasonable accommodation is approved or as otherwise required by law.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.